From the time Alan Turing came with the idea of Turing Machine it has been mathematically proven that any calculation can be performed using a Turing Machine. Also given the fact that current generation of computers are running at 3 GHz, it is still difficult to perform certain calculations on time and thus a greater impetus has gone into Parallel Processing, Superscalar Processors, SMP (Symmetric Multi Processing) and Hyper Threading. However all these solutions are limited by the type of problems they can address. Problems require to be NC hard to utilize hardware advantages, fulfill processing requirements to offer enough time slicing, at the same time communication between multiple processor for transferring values & decision decreases the overall processing speed, increases power requirements both for processing and communication and increases sizes of overall hardware required. A solution to this problem was offered by allowing multiple calculations through a dedicated hardware known as MAC (Multiply and Accumulate) where VLIW instructions were used to feed values for doing matrix multiplications involved in 3D geometry (Rotation, Translation) within the general purpose processor popularized by Intel as MMX and by Apple PowerBook as Altivec and Texas Instruments DSPs utilized these techniques for providing faster number crunching.
However in order to solve problems which are beyond NC and even P hard and are in NP-hard domain, customized hardware is required to speed things up which cannot be offered within the general purpose framework of microprocessors and DSPs. Then of course there are issues relating to I/O interfacing where newer sensors and devices are coming into market every year which have to be interfaced or experimented with along with applications where two different algorithms keep passing information back and forth while handling data from external devices, the time synchronization of all the information that is being collected & processed and some application needs very large number of devices to be connected to the overall system.
FPGA has changed all that by allowing not only parallel processing at very high speed, very low power, offering customized hardware solutions, fulfilling timing requirements and is many times offered a single chip solution for lot of applications interfacing multiple devices of varied kinds.
The advantages of reshaping the hardware are immense (not available with ASICs), for the same chip can be utilized for adding new devices which are not part of the generally available device. Since the base of every embedded application is the hardware on which it runs, change of hardware allows ability for more experimentation and flexibility for different and better solutions (for example hardware buffer size, registers can be increased to accommodate for new devices).
There are two types of development which are generally practiced. One is the processor style where the FPGA has a built in processor and an application is added as a device, the other is where the FPGA is completely used for doing processing and communicates through the I/O without the help of a central processing unit. Both approaches allow for parallelizing of calculations, it depends upon the developer which is better and more optimized.
There are two types of FPGAs for processor style scheme generally available in the market. One is the SoftCore base where the FPGA manufacturer provides a soft processor and the second one is HardCore base where the FPGA manufacturer provides an on chip processor for example Xilinx Virtex has ML 403 Power PC processor.
Each FPGA manufacturer allows logic design using a logic slice that consists of LUTs (Look up tables), Multiplexers, Flip Flops, DSP slice that consists of special multipliers, MACs, ALUs, SIMD (Single Instruction Multiple Data), ALU support for speeding calculations. FPGAs are also different in the way they can be programmed multiple times with the most common SRAM based FPGA (from Xilinx, Altera, Lattice) or a one time programmable ACTEL’s FPGA. FPGA also provides RAM to store extra values where some important functions can be stored for example Sine, Cosine tables.
The languages that are used most frequently for programming FPGAs are VHDL and Verilog. Each of the FPGA manufacturer offers tools with their softwares for simulating code on their FPGAs along with floor planning to optimize the design for power requirements and easy access to I/O pins.
Ascenten develops and verifies FPGA application modules simply based on customer’s requirement, the requirements can be obtained from the algorithms or a demonstrated C Code from the customer. Thus the company reduces turnaround time for development of products offering faster development and a solution where the regular path of processor (RISC or DSP) is not feasible. Moreover, our expertise in FPGA allows our customers to develop low power applications.
Ascenten has developed embedded applications using hard-core processor based FPGA (like Xilinx Virtex with ML 403 PPC, Altera Cyclone V with ARM) as well as soft-core processor FPGA like Spartan (Microblaze), Altera Cyclone III & Stratix. Ascenten has in-house expertise in RTOS, Embedded Linux and API development, thereby enabling us to provide API development that goes along with the CPU to interface your FPGA application to a PC or to run an LCD display.
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